1. Field of the Invention
The present invention relates generally to sense amplifiers, and more particularly, to methods and systems for a high-speed sense amplifier.
2. Description of the Related Art
A sense amplifier is often used to detect and couple (and even amplify) a data signal level on a data line. Sense amplifiers are typically used between a data output and a data input. By way of example, a sense amplifier can be used to detect a data signal level on a data line or data bus and then output the detected data level to an input of a processor.
FIG. 1 is a typical sense amplifier circuit 100. A data signal input line 112 conducts a data signal, such as from a data line or bus, to the input of a skewed inverter 106. The skewed inverter 106 senses a data signal on the data signal input line 112. When the data signal level passes a threshold level, the skewed inverter 106 switches state. A keeper circuit 108 latches the skewed inverter 106 once the sense amplifier has switched. An inverter 102 and NMOS 104 form a pre-charge circuit to pull up the data signal line 112 to reduce the time required for the data signal to raise to the threshold level. As a result, the switching time for the skewed inverter 106 is substantially reduced. An inverter 110 forms an output buffer for the skewed inverter 106. The inverter 10 can also amplify the output signal.
Output of the inverter 110 switches state approximately two “gate delays” after the data signal on the data signal line 112 raises to the threshold level required to cause the skewed inverter 106 to switch. The two gate delays are the cumulative time required for the skewed inverter 106 and the inverter 110 to switch.
In many applications and uses a sense amp needs to have less than the two-gate delay so as to not unduly delay the output data signal. In view of the foregoing, there is a need for a sense amp having a delay of less than a two-gate delay.